From bca7b84642d00ed29dfb00252d6ba3317795f342 Mon Sep 17 00:00:00 2001 From: Chengyu HAN Date: Wed, 15 Jan 2025 17:53:34 +0800 Subject: [PATCH] arm: remove AARCH64 ifdef --- include/openlibm_fenv_arm.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/include/openlibm_fenv_arm.h b/include/openlibm_fenv_arm.h index 4bd226a0..6f026373 100644 --- a/include/openlibm_fenv_arm.h +++ b/include/openlibm_fenv_arm.h @@ -70,12 +70,9 @@ extern const fenv_t __fe_dfl_env; #define _FPUSW_SHIFT 16 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT) -#if defined(__aarch64__) -#define __rfs(__fpsr) __asm __volatile("mrs %0,fpsr" : "=r" (*(__fpsr))) -#define __wfs(__fpsr) __asm __volatile("msr fpsr,%0" : : "r" (__fpsr)) /* Test for hardware support for ARM floating point operations, explicitly checking for float and double support, see "ARM C Language Extensions", 6.5.1 */ -#elif defined(__ARM_FP) && (__ARM_FP & 0x0C) != 0 +#if defined(__ARM_FP) && (__ARM_FP & 0x0C) != 0 #define __rfs(__fpsr) __asm __volatile("vmrs %0,fpscr" : "=&r" (*(__fpsr))) #define __wfs(__fpsr) __asm __volatile("vmsr fpscr,%0" : : "r" (__fpsr)) #else