morello: Use non-capability br/blr for the benchmark ABI kernel.

CTSRD-CHERI · May 3, 2024 · 10c03e6 · 10c03e6
1 parent 657111b
commit 10c03e6
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diff --git a/sys/arm64/arm64/efirt_support.S b/sys/arm64/arm64/efirt_support.S
@@ -74,7 +74,12 @@ ENTRY(efi_rt_arch_call_nofault)
 	mov	x10, #20
 	sub	x8, x10, x8, lsl #2
 	add	c9, c9, x8, uxtx
+#ifdef __ARM_MORELLO_PURECAP_BENCHMARK_ABI
+	sub     x9, x9, #1
+	br	x9
+#else
 	br	c9
+#endif
 
 	/* Load the arguments into registers */
 0:	ldr	x4, [c0, #EC_ARG5]
@@ -103,7 +108,11 @@ ENTRY(efi_rt_arch_call_nofault)
 	bx	#4
 	.arch_extension	noc64
 	.arch_extension	a64c
+#ifdef __ARM_MORELLO_PURECAP_BENCHMARK_ABI
+	blr	x6
+#else
 	blr	c6
+#endif
 	bx	#4
 	.arch_extension	c64
 

diff --git a/sys/arm64/arm64/exception.S b/sys/arm64/arm64/exception.S
@@ -92,7 +92,11 @@
 	ldr	PTR(1), [PTR(18), #PC_SSBD]
 	cbz	x1, 1f
 	mov	w0, #1
+#ifdef __ASM_MORELLO_PURECAP_BENCHMARK_ABI
+	blr	x1
+#else
 	blr	PTR(1)
+#endif
 1:
 
 #ifdef PAC
@@ -135,7 +139,11 @@
 	ldr	PTR(1), [PTR(18), #PC_SSBD]
 	cbz	x1, 1f
 	mov	w0, #0
+#ifdef __ARM_MORELLO_PURECAP_BENCHMARK_ABI
+	blr	x1
+#else
 	blr	PTR(1)
+#endif
 1:
 .endif
 	ldp	CAP(18), CAPN(lr), [PTRN(sp), #(TF_SP)]