Skip to content

Commit

Permalink
use Reg instead of Operand if possible
Browse files Browse the repository at this point in the history
  • Loading branch information
@herumi
herumi committed Nov 8, 2023
1 parent de13534 commit 24b71a1
Show file tree
Hide file tree
Showing 3 changed files with 25 additions and 18 deletions.
2 changes: 1 addition & 1 deletion gen/gen_code.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -542,7 +542,7 @@ void put()
};
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
const Tbl *p = &tbl[i];
printf("void %s(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | %s, 0x%02X, %s); }\n", p->name, p->type, p->code, p->cond);
printf("void %s(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | %s, 0x%02X, %s); }\n", p->name, p->type, p->code, p->cond);
}
}
{
Expand Down
17 changes: 12 additions & 5 deletions xbyak/xbyak.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2106,14 +2106,14 @@ class CodeGenerator : public CodeArray {
}
}
}
void opSSE(const Operand& reg, const Operand& op, int type, int code, bool isValid(const Operand&, const Operand&), int imm8 = NONE)
void opSSE(const Reg& r, const Operand& op, int type, int code, bool isValid(const Operand&, const Operand&), int imm8 = NONE)
{
if (isValid && !isValid(reg, op)) XBYAK_THROW(ERR_BAD_COMBINATION)
if (!isValidSSE(reg) || !isValidSSE(op)) XBYAK_THROW(ERR_NOT_SUPPORTED)
if (isValid && !isValid(r, op)) XBYAK_THROW(ERR_BAD_COMBINATION)
if (!isValidSSE(r) || !isValidSSE(op)) XBYAK_THROW(ERR_NOT_SUPPORTED)
if (op.isMEM()) {
opMR(op.getAddress(), reg.getReg(), type, code, (imm8 != NONE) ? 1 : 0);
opMR(op.getAddress(), r, type, code, (imm8 != NONE) ? 1 : 0);
} else {
opRR(reg.getReg(), op.getReg(), type, code);
opRR(r, op.getReg(), type, code);
}
if (imm8 != NONE) db(imm8);
}
Expand Down Expand Up @@ -2177,10 +2177,17 @@ class CodeGenerator : public CodeArray {
}
void opRO(const Reg& r, const Operand& op, bool condR, bool condM, int type, int code, int immSize = 0)
{
#if 0
if (condM) {
opMR(op.getAddress(), r, type, code, immSize);
} else if (condR) {
opRR(r, op.getReg(), type, code);
#else
if (condR) {
opRR(r, op.getReg(), type, code);
} else if (condM) {
opMR(op.getAddress(), r, type, code, immSize);
#endif
} else {
XBYAK_THROW(ERR_BAD_COMBINATION)
}
Expand Down
24 changes: 12 additions & 12 deletions xbyak/xbyak_mnemonic.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -156,25 +156,25 @@ void crc32(const Reg32e& reg, const Operand& op) { if (reg.isBit(32) && op.isBit
void cvtdq2pd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0xE6, isXMM_XMMorMEM); }
void cvtdq2ps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | 0, 0x5B, isXMM_XMMorMEM); }
void cvtpd2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0xE6, isXMM_XMMorMEM); }
void cvtpd2pi(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_66, 0x2D, isMMX_XMMorMEM); }
void cvtpd2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_66, 0x2D, isMMX_XMMorMEM); }
void cvtpd2ps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5A, isXMM_XMMorMEM); }
void cvtpi2pd(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_66, 0x2A, isXMM_MMXorMEM); }
void cvtpi2ps(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | 0, 0x2A, isXMM_MMXorMEM); }
void cvtpi2pd(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_66, 0x2A, isXMM_MMXorMEM); }
void cvtpi2ps(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | 0, 0x2A, isXMM_MMXorMEM); }
void cvtps2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5B, isXMM_XMMorMEM); }
void cvtps2pd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | 0, 0x5A, isXMM_XMMorMEM); }
void cvtps2pi(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | 0, 0x2D, isMMX_XMMorMEM); }
void cvtsd2si(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F2, 0x2D, isREG32_XMMorMEM); }
void cvtps2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | 0, 0x2D, isMMX_XMMorMEM); }
void cvtsd2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F2, 0x2D, isREG32_XMMorMEM); }
void cvtsd2ss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5A, isXMM_XMMorMEM); }
void cvtsi2sd(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F2, 0x2A, isXMM_REG32orMEM); }
void cvtsi2ss(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F3, 0x2A, isXMM_REG32orMEM); }
void cvtsi2sd(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F2, 0x2A, isXMM_REG32orMEM); }
void cvtsi2ss(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F3, 0x2A, isXMM_REG32orMEM); }
void cvtss2sd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5A, isXMM_XMMorMEM); }
void cvtss2si(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F3, 0x2D, isREG32_XMMorMEM); }
void cvtss2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F3, 0x2D, isREG32_XMMorMEM); }
void cvttpd2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0xE6, isXMM_XMMorMEM); }
void cvttpd2pi(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_66, 0x2C, isMMX_XMMorMEM); }
void cvttpd2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_66, 0x2C, isMMX_XMMorMEM); }
void cvttps2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5B, isXMM_XMMorMEM); }
void cvttps2pi(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | 0, 0x2C, isMMX_XMMorMEM); }
void cvttsd2si(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F2, 0x2C, isREG32_XMMorMEM); }
void cvttss2si(const Operand& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F3, 0x2C, isREG32_XMMorMEM); }
void cvttps2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | 0, 0x2C, isMMX_XMMorMEM); }
void cvttsd2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F2, 0x2C, isREG32_XMMorMEM); }
void cvttss2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F | T_F3, 0x2C, isREG32_XMMorMEM); }
void cwd() { db(0x66); db(0x99); }
void cwde() { db(0x98); }
void dec(const Operand& op) { opIncDec(op, 0x48, 1); }
Expand Down

0 comments on commit 24b71a1

Please sign in to comment.