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x86 AVX512: add support for the _mm512_alignr_epi32 instruction #1265
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Dear @NewAgeDaedalus ; thank you for your contribution! It is very welcome. I left some comments, mostly about matching the style of the existing SIMDe code and comparing your implementation to the existing simde_mm256_alignr_epi8 function.
I'll be happy to receive and review additional implementations of the AVX512 alignr functions once this one is merged. Now that you have a sense of our coding style, feel free to bundle related functions into one PR in the future.
And again, thank you!
* 2020 Evan Nemerson <[email protected]> | ||
* 2020 Christopher Moore <[email protected]> | ||
* 2023 Michael R. Crusoe <[email protected]> |
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* 2020 Evan Nemerson <evan@nemerson.com> | |
* 2020 Christopher Moore <moore@free.fr> | |
* 2023 Michael R. Crusoe <crusoe@debian.org> | |
* 2025 Fabian Penezic <fabian.penezic@fer.hr> |
When making a new file, you should only list yourself; thanks!
#include "../avx2.h" | ||
#include "mov.h" | ||
#include "extract.h" | ||
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#include <stdio.h> |
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#include "../avx2.h" | |
#include "mov.h" | |
#include "extract.h" | |
#include <stdio.h> | |
#include "setzero.h" |
a_p = simde__m512i_to_private(a), | ||
b_p = simde__m512i_to_private(b), | ||
r_p; |
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a_p = simde__m512i_to_private(a), | |
b_p = simde__m512i_to_private(b), | |
r_p; | |
a_ = simde__m512i_to_private(a), | |
b_ = simde__m512i_to_private(b), | |
r_; |
To be consistent with the other SIMDe code, we name the private versions of variables with just a _
suffix
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SIMDE_FUNCTION_ATTRIBUTES | ||
simde__m512i | ||
simde_mm512_alignr_epi32 (simde__m512i a, simde__m512i b, const int imm8){ |
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simde_mm512_alignr_epi32 (simde__m512i a, simde__m512i b, const int imm8){ | |
simde_mm512_alignr_epi32 (simde__m512i a, simde__m512i b, const int imm8) | |
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { |
a_p = simde__m512i_to_private(a), | ||
b_p = simde__m512i_to_private(b), | ||
r_p; | ||
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if (HEDLEY_UNLIKELY(count > 31)) | |
return simde_mm512_setzero_epi32(); | |
size_t len = sizeof(a_p)/sizeof(a_p.i32[0]); | ||
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for (size_t i = 0; i < (0xF & imm8); i++) { | ||
r_p.i32[len-i-1] = a_p.i32[(0xF & imm8) - i - 1]; | ||
} | ||
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for (size_t i = (imm8 & 0xF), j=0; i < len; i++) { | ||
r_p.i32[len - i - 1] = b_p.i32[len - j - 1]; | ||
j++; | ||
} |
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Please review how simde_mm256_alignr_epi8 was implemented. Please try to match the same style and include the SIMDE_VECTORIZE
macro.
#if defined(SIMDE_X86_AVX512F_NATIVE) | ||
#define simde_mm512_alignr_epi32(a, b, imm8) _mm512_alignr_epi32(a, b, imm8); | ||
#endif | ||
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) | |
#undef _mm512_alignr_epi32 | |
#define _mm512_alignr_epi32(a, b, count) simde_mm512_alignr_epi32((a), (b), (count)) | |
#endif | |
simde_assert_m512i_i32(r, ==, test_vec[2].r); | ||
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return 0; | ||
} |
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Thank you for including a test! Did you generate the test value on a AVX512F capable CPU?
Please include the code that you used to generate the test values:
simde/test/x86/avx512/shuffle.c
Lines 493 to 507 in f56ef45
#else | |
fputc('\n', stdout); | |
for (int i = 0; i < 8; i++) { | |
simde__m512i r, a = simde_test_x86_random_i32x16(); | |
int32_t imm8 = simde_test_codegen_random_i8() & 3; | |
SIMDE_CONSTIFY_4_(simde_mm512_shuffle_epi32, r, (HEDLEY_UNREACHABLE(), a), imm8, a); | |
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST); | |
simde_test_codegen_write_i32(2, imm8, SIMDE_TEST_VEC_POS_MIDDLE); | |
simde_test_x86_write_i32x16(2, r, SIMDE_TEST_VEC_POS_LAST); | |
} | |
return 1; | |
#endif |
Oh, and please add an entry for |
I want to add support for the alignr instructions. Would love feedback if such implementation of these instructions is acceptable and implement the rest of them at a later date.